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- 1 - e09411 n o t e on h an dli ng gaas mmic?s are esd sensitive devices. special handling precautions are required. sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illu strating the operation of the devices. sony cannot as sume responsibility for any problems aris ing out of the use of these circuits. CXM3560XR sp10t antenna switch for gs m/umts dual mode handsets description the CXM3560XR is sp10t antenna switch for gsm/umts dual mode handsets. the CXM3560XR has a 1.8v cmos compatible decoder. the sony gaas junction gate phemt (jphemt) mmic pr ocess is used for low insertion loss and high linearity. (applications: gsm (4bands) and umts (4bands) dual-mode handsets) features ? low insertion loss: 0.30db (typ.) tx1 (gsm low band tx) 0.45db (typ.) tx2 (gsm high band tx) 0.60db (typ.) trx1 (umts band i ) ? low voltage operation:v dd = 2.5v ? no dc blocking capacit ors required on rf ports ? small package size: xqfn-24p-02 (2.2mm 2.9mm 0.4mm max.) ? lead-free and rohs compliant structure gaas junction gate phemt (jph emt) mmic switch, cmos decoder absolute maximum ratings (ta = 25 c) ? bias voltage v dd 4v ? control voltage (ctl-a/b/c/d) vctl 4 v ? input power max. [tx1] 36 dbm (duty cycle = 12.5 to 50%) ? input power max. [tx2] 34 dbm (duty cycle = 12.5 to 50%) ? input power max. [trx1, 2, 3, 4] 32 dbm ? input power max. [rx1, 2, 3, 4] 13 dbm ? operating temperature range ?35 to +85 c ? storage temperature range ?65 to +150 c
CXM3560XR - 2 - block diagram sp10t antenna switch pin configuration ant decoder logic trx1 trx2 trx3 tx1 tx2 rx1 rx2 rx3 rx4 trx4 7 5 22 21 23 20 24 10 11 9 12 8 4 6 1 13 15 16 14 19 gnd rx1 rx2 rx3 gnd gnd trx4 gnd trx3 3 17 rx4 gnd 2 18 trx1 trx2 gnd ctla ant gnd gnd tx2 tx1 ctlb ctlc ctld v dd 24-pin xqfn (2.2mm 2.9mm 0.4mm max.) top view
CXM3560XR - 3 - pin description pin no. name pin no. name 1gnd 13gnd 2trx2 14rx1 3 gnd 15 rx2 4trx3 16rx3 5 gnd 17 rx4 6 trx4 18 trx1 7gnd 19gnd 8 ant 20 v dd 9 gnd 21 ctld 10 tx2 (dcs/pcs) 22 ctlc 11 gnd 23 ctlb 12 tx1 (gsm850/900m) 24 ctla
CXM3560XR - 4 - rf switch truth table tx1 tx2 rx2 rx3 rx4 trx1 ant f1 f2 f14 f4 f5 f9 f10 rx1 f7 f3 f16 trx2 f17 f18 trx3 f19 f20 trx4 f21 f6 state active path vctl state switch state a b c d f1 f2 f3 f4 f5 f6 f7 f9 f10 f14 f16 f17 f18 f19 f20 f21 1 tx1 h hll h llllll hh ll h l h l h 2tx2 h lll lh lllll lh ll h l h l h 3 rx1 l lll ll h llll h l h l h l h l h 4 rx2 l lhl lllhlll h l h l h l h l h 5 rx3 l hhl llll hl lhl h l h l h l h 6 rx4 l hll lllll h l h l h l h l h l h 7trx1 h lhl llllllh hh ll h l h l h 8 trx2 h hhl lllllllh h l h l l h l h 9 trx3 h lhh lllllll hh l lhhl l h 10 trx4 h hhh l l l l l ll h h l lh l hh l
CXM3560XR - 5 - electrical characteristics supply voltage value (ta = 25 c) logic value (ta = 25 c) item min. typ. max. unit bias voltage (v dd ) +2.5 +2.65 +3.3 v item state min. typ. max. unit control voltage (ctl-a/b/c/d) high +1.5 +1.8 +3.3 v low 0 ? +0.3
CXM3560XR - 6 - specification 1 (ta = 25 c, v dd = 2.5v, vctl = 1.5v) item symbol port condition min. typ. max. unit insertion loss il ant-tx1 *1 ?0.300.45 db ant-tx2 *2 ?0.450.60 ant-rx1 *3 ?0.750.90 *4 ?1.001.15 ant-rx2 *3 ?0.750.90 *4 ?1.001.15 ant-rx3 *3 ?0.750.90 *4 ?1.001.15 ant-rx4 *3 ?0.750.90 *4 ?1.001.15 ant-trx1 *5 ?0.550.70 *6 ?0.600.75 ant-trx2 *5 ?0.600.75 *6 ?0.680.83 *7 ?0.450.60 *8 ?0.450.60 *9 ?0.570.72 *10 ?0.600.75 ant-trx3 *7 ?0.450.60 *8 ?0.450.60 *9 ?0.600.75 *10 ?0.620.77 ant-trx4 *7 ?0.400.55 *8 ?0.400.55 *9 ?0.650.80 *10 ?0.660.81 vswr vswr all ports in active paths 824 to 2170mhz ? 1.20 ? ? harmonics 2fo tx1-ant *1 ? ?50 ?36 dbm 3fo ? ?40 ?35 2fo tx2-ant *2 ? ?45 ?36 3fo ? ?40 ?33 2fo trx1-ant *5 ? ?55 ?39 3fo ? ?54 ?39 2fo trx2-ant *7 , *9 ? ?65 ?39 3fo ? ?58 ?39 2fo trx3-ant *7 , *9 ? ?65 ?39 3fo ? ?58 ?39 2fo trx4-ant *7 ? ?65 ?39 3fo ? ?58 ?39
CXM3560XR - 7 - electrical characteristics are measur ed with all rf ports terminated in 50 . *1 pin on tx1: 34dbm, 824 to 915mhz, tx1 enabled *2 pin on tx2: 32dbm, 1710 to 1910mhz, tx2 enabled *3 pin on ant: 10dbm, 869 to 960mhz, rx1, rx2, rx3 or rx4 enabled *4 pin on ant: 10dbm, 1805 to 1990mhz, rx1, rx2, rx3 or rx4 enabled *5 pin on trx1 or trx2: 26dbm, 1920 to 1980mhz, trx1 or trx2 enabled *6 pin on ant: 10dbm, 2110 to 2170mhz, trx1 or trx2 enabled *7 pin on trx2, trx3 or trx4: 26dbm, 824 to 849mhz, trx2, trx3 or trx4 enabled *8 pin on ant: 10dbm, 869 to 894mhz, trx2, trx3 or trx4 enabled *9 pin on trx2, trx3 or trx4: 26dbm, 1710 to 1910mhz, trx2, trx3 or trx4 enabled *10 pin on ant: 10dbm, 1805 to 1990mhz, trx2, trx3 or trx4 enabled *11 pin on trx1: 20dbm, 1950mhz, pin on ant: ?15dbm, 190mhz, trx1 enabled *12 pin on trx2 or trx3: 20dbm, 1745mhz, pin on ant: ?15dbm, 95mhz, trx2 or trx3 enabled *13 pin on trx2 or trx3: 20dbm, 1880mhz, pin on ant: ?15dbm, 80mhz, trx2 or trx3 enabled *14 pin on trx2, trx3 or trx4: 20dbm, 835mhz, pin on ant: ?15dbm, 45mhz, trx2, trx3 or trx4 enabled *15 pin on trx1: 20dbm, 1950mhz, pin on ant: ?15dbm, 1760mhz, trx1 enabled *16 pin on trx2 or trx3: 20dbm, 1745mhz, pin on ant: ?15dbm, 1650mhz, trx2 or trx3 enabled *17 pin on trx2 or trx3: 20dbm, 1880mhz, pin on ant: ?15dbm, 1800mhz, trx2 or trx3 enabled *18 pin on trx2, trx3 or trx4: 20dbm, 835mhz, pin on ant: ?15dbm, 790mhz, trx2, trx3 or trx4 enabled *19 measured with the recommended circuit inter modulation product power in rx band imd2 trx1-ant *11 , *19 ? ?105 ?97 dbm trx2-ant *12 , *19 ? ?105 ?97 *13 , *19 ? ?105 ?97 *14 , *19 ? ?105 ?97 trx3-ant *12 , *19 ? ?105 ?97 *13 , *19 ? ?105 ?97 *14 , *19 ? ?105 ?97 trx4-ant *14 , *19 ? ?105 ?97 imd3 trx1-ant *15 , *19 ? ?105 ?97 trx2-ant *16 , *19 ? ?105 ?97 *17 , *19 ? ?105 ?97 *18 , *19 ? ?105 ?97 trx3-ant *16 , *19 ? ?105 ?97 *17 , *19 ? ?105 ?97 *18 , *19 ? ?105 ?97 trx4-ant *18 , *19 ? ?105 ?97 switching time ts 50%ctl to 90%rf ? 3 5 s control current ictl vctl = 1.80v ? 1 5 a supply current idd v dd = 2.65v ? 0.18 0.40 ma item symbol port condition min. typ. max. unit
CXM3560XR - 8 - specification 1-isolation (ta = 25 c, v dd = 2.5v, vctl = 1.5v) item symbol path condition min. typ. max. unit active isolation isolation iso tx1 tx1-rx1 824 to 915mhz 35 50 ? db tx1-rx2 35 55 ? tx1-rx3 35 55 ? tx1-rx4 35 55 ? tx1-trx1 25 30 ? tx1-trx2 25 48 ? tx1-trx3 25 50 ? tx1-trx4 25 35 ? tx1-tx2 25 35 ? tx1-tx2 1648 to 1830mhz 18 25 ? tx2 tx2-rx1 1710 to 1910mhz 35 55 ? tx2-rx2 35 55 ? tx2-rx3 35 55 ? tx2-rx4 35 45 ? tx2-trx1 20 23 ? tx2-trx2 20 38 ? tx2-trx3 20 40 ? tx2-trx4 20 30 ? tx2-tx1 16 19 ? trx1 trx1-rx1 1920 to 1980mhz 30 53 ? trx1-rx2 30 48 ? trx1-rx3 30 40 ? trx1-rx4 20 24 ? trx1-trx2 27 35 ? trx1-trx3 23 40 ? trx1-trx4 23 30 ? trx1-tx1 17 19 ? trx1-tx2 20 33 ?
CXM3560XR - 9 - electrical characteristics are measur ed with all rf ports terminated in 50 . isolation iso trx2 trx2-rx1 824 to 849mhz 30 62 ? db trx2-rx2 30 62 ? trx2-rx3 30 62 ? trx2-rx4 30 55 ? trx2-trx1 20 30 ? trx2-trx3 20 30 ? trx2-trx4 20 35 ? trx2-tx1 20 27 ? trx2-tx2 20 45 ? trx2-rx1 1710 to 1910mhz 30 58 ? trx2-rx2 30 58 ? trx2-rx3 30 55 ? trx2-rx4 30 45 ? trx2-trx1 18 23 ? trx2-trx3 18 24 ? trx2-trx4 18 28 ? trx2-tx1 17 19 ? trx2-tx2 20 34 ? trx3 trx3-rx1 824 to 849mhz 30 62 ? trx3-rx2 30 62 ? trx3-rx3 30 62 ? trx3-rx4 30 57 ? trx3-trx1 20 30 ? trx3-trx2 20 35 ? trx3-trx4 20 32 ? trx3-tx1 20 26 ? trx3-tx2 20 45 ? trx3-rx1 1710 to 1910mhz 30 57 ? trx3-rx2 30 58 ? trx3-rx3 30 55 ? trx3-rx4 30 45 ? trx3-trx1 18 23 ? trx3-trx2 18 29 ? trx3-trx4 18 25 ? trx3-tx1 17 19 ? trx3-tx2 20 33 ? trx4 trx4-rx1 824 to 849mhz 35 62 ? trx4-rx2 35 62 ? trx4-rx3 35 62 ? trx4-rx4 35 57 ? trx4-trx1 20 30 ? trx4-trx2 35 42 ? trx4-trx3 30 35 ? trx4-tx1 20 27 ? trx4-tx2 30 45 ? item symbol path condition min. typ. max. unit active isolation
CXM3560XR - 10 - recommended circuit note) 1. no dc blocking capacitors are required on all rf ports. 2. dc levels of all rf ports are gnd. 3. l1 inductor(22nh) and c1 capacitor(22pf) are recommended on ant port for esd protection. 4. c2 capacitor (100pf) is recommended. 7 5 22 21 23 20 24 10 11 9 12 8 4 6 1 13 14 rx2 rx3 trx4 c1 c2 100pf l1 trx3 3 rx4 2 trx1 trx2 ctla ctlb ctlc ctld v dd 24-pin xqfn (2.2mm 2.9mm 0.4mm max.) to p v i e w 15 16 19 17 18 tx2 tx1 ant c2 c2 c2 c2 rx1
CXM3560XR - 11 - pcb layout template pkg outline 4-r0.2 3.3 specification ? pkg size: 2.9mm 2.2mm t0.35mm ? terminal pitch: 0.35mm ? terminal length: 0.25mm ? mask thickness: 0.11mm : land area : mask open area (solder printing area) : metal area in board (gnd plane is recommended.) : board resist open area : pkg outline 2.9 (pkg size) 1.8 2.6 2.2 (pkg size) 1.1 0.35 0.35 0.28 0.2 0.5 0.2 0.25 0.28 r0.05 r0.05 c0.1 c0.05 0.2 detail a detail a xqfn-24p-02 macro for mmic (reference)
CXM3560XR - 12 - sony corporation package outline (unit: mm) lead plating specifications item lead material copper alloy solder composition sn-bi bi:1-4wt% plating thickness 5-18m spec.

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